Figure 1. sextl32
Description
This instruction sign-extends a word (32 bits) into a long (64 bits). Bit 32 in rAL will be copied into bits 0-31 of rDL. Bits 32-63 in rAL will be copied into bits 32-63 of rDL.
Pseudocode
(rDL)[0:31] ← (rAL)[32]
(rDL)[32:63] ← (rAL)[32:63]Registers Altered
- rDL
Latency
- 1 cycle