Figure 1. sextl16
Description
This instruction sign-extends a halfword (16 bits) into a long (64 bits). Bit 48 in rAL will be copied into bits 0-47 of rDL. Bits 48-63 in rAL will be copied into bits 48-63 of rDL.
Pseudocode
rDL)[0:47] ← (rAL)[48]
(rDL)[48:63] ← (rAL)[48:63]Registers Altered
- rDL
Latency
- 1 cycle