Figure 1. sext16
Description
This instruction sign-extends a halfword (16 bits) into a word (32 bits). Bit 16 in rA will be copied into bits 0-15 of rD. Bits 16-31 in rA will be copied into bits 16-31 of rD.
Pseudocode
(rD)[0:15] ← (rA)[16]
(rD)[16:31] ← (rA)[16:31]Registers Altered
- rD
Latency
- 1 cycle