Figure 1. pcmplbf
Description
The contents of register rAL are bytewise compared with the contents in register rBL.
- rD is loaded with the position of the first matching byte pair, starting with MSB as position 1, and comparing until LSB as position 8
- If none of the byte pairs match, rD is set to 0
Pseudocode
if rBL[0:7] = rAL[0:7] then
(rD) ← 1
else if rBL[8:15] = rAL[8:15] then
(rD) ← 2
else if rBL[16:23] = rAL[16:23] then
(rD) ← 3
else if rBL[24:31] = rAL[24:31] then
(rD) ← 4
else if rBL[32:39] = rAL[32:39] then
(rD) ← 5
else if rBL[40:47] = rAL[40:47] then
(rD) ← 6
else if rBL[48:55] = rAL[48:55] then
(rD) ← 7
else if rBL[56:63] = rAL[56:63] then
(rD) ← 8
else
(rD) ← 0
Registers Altered
- rD
Latency
- 1 cycle
Notes
- This instruction is only available when the parameter
C_USE_PCMP_INSTR
is set to 1.