muli - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)
Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. muli muli Process.49 0 0 Process.44 1 1 Process.45 1 1 Process.46 0 0 Process.47 0 0 Process.48 0 0 Process.50 Process.9 rD, rA, IMM rD, rA, IMM Process.12 muli muli Process.13 rA rA Process.14 rD rD Sheet.18 Multiply Immediate Multiply Immediate Sheet.20 0 0 Sheet.23 6 6 Sheet.24 11 11 Sheet.25 16 16 Sheet.27 31 31 Process.58 IMM IMM

Description

Multiplies the contents of registers rA and the value IMM, sign-extended to 32 bits; and puts the result in register rD. This is a 32-bit by 32-bit multiplication that will produce a 64-bit result. The least significant word of this value is placed in rD. The most significant word is discarded.

Pseudocode

(rD) ← LSW( (rA) × sext(IMM) )

Registers Altered

  • rD

Latency

  • 1 cycle with C_AREA_OPTIMIZED=0 or 2
  • 3 cycles with C_AREA_OPTIMIZED=1

Notes

  • By default, Type B Instructions will take the 16-bit IMM field value and sign extend it to 32 bits to use as the immediate operand. This behavior can be overridden by preceding the Type B instruction with an imm instruction. See the instruction imm for details on using 32-bit immediate values.
  • This instruction is only valid if the target architecture has multiplier primitives, and if present, the MicroBlaze parameter C_USE_HW_MUL is greater than 0.