lbu - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. lbu

Description

Loads a byte (8 bits) from the memory location that results from adding the contents of registers rAX and rBX. The data is placed in the least significant byte of register rDX and the other bytes in rDX are cleared.

If the R bit is set, a byte reversed memory location is used, loading data with the opposite endianness of the endianness defined by the E bit (if virtual protected mode is enabled).

If the EA bit is set, an extended address is used, formed by concatenating rA and rB instead of adding them.

A data TLB miss exception occurs if virtual protected mode is enabled, and a valid translation entry corresponding to the address is not found in the TLB.

A data storage exception occurs if access is prevented by a no-access-allowed zone protection. This only applies to accesses with user mode and virtual protected mode enabled.

A privileged instruction error occurs if the EA bit is set, Physical Address Extension (PAE) is enabled, and the instruction is not explicitly allowed.

Pseudocode

if EA = 1 then
   Addr ← (rA) & (rB)
else
   Addr ← (rAx) + (rBx)
if TLB_Miss(Addr) and MSR[VM] = 1 then
   ESR[EC] ← 10010; ESR[S] ← 0
   MSR[UMS] ← MSR[UM]; MSR[VMS] ← MSR[VM]; MSR[UM] ← 0; MSR[VM] ← 0
else if Access_Protected(Addr) and MSR[UM] = 1 and MSR[VM] = 1 then
   ESR[EC] ← 10000; ESR[S] ← 0 ; ESR[DIZ] ← 1
   MSR[UMS] ← MSR[UM]; MSR[VMS] ← MSR[VM]; MSR[UM] ← 0; MSR[VM] ← 0
else
   (rDx)[C_DATA_SIZE-8:C_DATA_SIZE-1] ← Mem(Addr)
   (rDx)[0:C_DATA_SIZE-9] ←   0

Registers Altered

  • rDX, unless an exception is generated, in which case the register is unchanged
  • MSR[UM], MSR[VM], MSR[UMS], MSR[VMS], if an exception is generated
  • ESR[EC], ESR[S], if an exception is generated
  • ESR[DIZ], if a data storage exception is generated

Latency

  • 1 cycle with C_AREA_OPTIMIZED=0 or 2
  • 2 cycles with C_AREA_OPTIMIZED=1

Notes

  • The byte reversed instruction is only valid if MicroBlaze is configured to use reorder instructions (C_USE_REORDER_INSTR = 1).
  • The extended address instruction is only valid if MicroBlaze is configured to use extended address (C_ADDR_SIZE > 32) and is using 32-bit mode (C_DATA_SIZE = 32).