flt - 2025.1 English - UG984

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2025-05-29
Version
2025.1 English
Figure 1. flt

Description

Converts the signed integer in register rA to floating-point and puts the result in register rD. This is a 32-bit rounding signed conversion that will produce a 32-bit floating-point result.

Pseudocode

(rD) ← float ((rA))

Registers Altered

  • rD

Latency

  • 5 cycles with C_AREA_OPTIMIZED=0
  • 7 cycles with C_AREA_OPTIMIZED=1
  • 2 cycles with C_AREA_OPTIMIZED=2

Note

This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 2 (Extended).