Figure 1. flt
Description
Converts the signed integer in register rA to floating-point and puts the result in register rD. This is a 32-bit rounding signed conversion that will produce a 32-bit floating-point result.
Pseudocode
(rD) ← float ((rA))
Registers Altered
- rD
Latency
- 5 cycles with
C_AREA_OPTIMIZED
=0 - 7 cycles with
C_AREA_OPTIMIZED
=1 - 2 cycles with
C_AREA_OPTIMIZED
=2
Note
This instruction is only available when the MicroBlaze parameter
C_USE_FPU
is set to 2 (Extended).