dsqrt - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. dsqrt

Description

Performs a double precision floating-point square root on the value in rAL and puts the result in register rDL.

Pseudocode

if isDnz(rAL) then
   (rDL) ← 0xFFF8000000000000
   FSR[DO] ← 1
   ESR[EC] ← 00110
else if isSigNaN(rAL) then
   (rDL) ← 0xFFF8000000000000
   FSR[IO] ← 1
   ESR[EC] ← 00110
else if isQuietNaN(rAL) then
   (rDL) ← 0xFFF8000000000000
else if (rAL) < 0 then
   (rDL) ← 0xFFF8000000000000
   FSR[IO] ← 1
   ESR[EC] ← 00110
else if (rAL) = -0 then
   (rDL) ← -0
else
   (rDL) ← sqrt ((rAL))

Registers Altered

  • rDL, unless an FP exception is generated, in which case the register is unchanged
  • ESR[EC], if an FP exception is generated
  • FSR[IO,DO]

Latency

  • 27 cycles with C_AREA_OPTIMIZED=0
  • 29 cycles with C_AREA_OPTIMIZED=1
  • 23 cycles with C_AREA_OPTIMIZED=2

Notes

  • This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 2 (Extended).