dlong - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. dlong

Description

Converts the double precision floating-point number in register rAL to a signed long value and puts the result in register rDL. This is a 64-bit truncating signed conversion that will produce a 64-bit long result.

Pseudocode

if isDnz(rAL) then
   (rDL) ← 0xFFF8000000000000
   FSR[DO] ← 1
   ESR[EC] ← 00110
else if isNaN(rAL) then
   (rDL) ← 0xFFF8000000000000
   FSR[IO] ← 1
   ESR[EC] ← 00110
else if isInf(rAL) or (rAL) < -263 or (rAL) > 263 - 1 then
   (rDL) ← 0xFFF8000000000000
   FSR[IO] ← 1
   ESR[EC] ← 00110
else
   (rDL) ← long ((rAL))

Registers Altered

  • rDL, unless an FP exception is generated, in which case the register is unchanged
  • ESR[EC], if an FP exception is generated
  • FSR[IO,DO]

Latency

  • 4 cycles with C_AREA_OPTIMIZED=0
  • 6 cycles with C_AREA_OPTIMIZED=1
  • 1 cycle with C_AREA_OPTIMIZED=2

Notes

  • This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 2 (Extended).