clz - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. clz

Description

This instruction counts the number of leading zeros in register rA starting from the most significant bit. The result is a number between 0 and 32, stored in register rD.

The result in rD is 32 when rA is 0, and it is 0 if rA is 0xFFFFFFFF.

Pseudocode

n ← 0
while (rA)[n] = 0
      n ← n + 1
(rD) ← n

Registers Altered

  • rD

Latency

1 cycle

Note

This instruction is only available when the parameter C_USE_PCMP_INSTR is set to 1.