bsl - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. bsl

Description

Shifts the contents of register rAL by the amount specified in register rB and puts the result in register rDL.

The mnemonic bsll sets the S bit (Side bit). If the S bit is set, the barrel shift is done to the left. The mnemonics bslrl and bslra clear the S bit and the shift is done to the right.

The mnemonic bslra will set the T bit (Type bit). If the T bit is set, the barrel shift performed is Arithmetical. The mnemonics bslrl and bslll clear the T bit and the shift performed is Logical.

Pseudocode

if S = 1 then
   (rDL) ← (rAL) << (rB)[26:31]
else
   if T = 1 then
      if ((rB)[26:31]) ≠ 0 then
         (rDL)[0:(rB)[26:31]-1] ← (rAL)[0]
         (rDL)[(rB)[26:31]:31] ← (rAL) >> (rB)[26:31]
      else
         (rDL) ← (rAL)
   else
      (rDL) ← (rAL) >> (rB)[26:31]

Registers Altered

  • rDL

Latency

  • 1 cycle with C_AREA_OPTIMIZED=0 or 2
  • 2 cycles with C_AREA_OPTIMIZED=1

Notes

  • These instructions are optional. To use them, MicroBlaze has to be configured to use barrel shift instructions (C_USE_BARREL=1).