Programs running on MicroBlaze use effective addresses to
access a flat 4 GB address space with 32-bit MicroBlaze, and up to a
16 EB address space with 64-bit MicroBlaze depending on parameter
C_ADDR_SIZE.
The processor can interpret this address space in one of two ways, depending on the translation mode:
- In real mode, effective addresses are used to directly access physical memory.
- In virtual mode, effective addresses are translated into physical addresses by the virtual-memory management hardware in the processor.
Virtual mode provides system software with the ability to relocate programs and data anywhere in the physical address space. System software can move inactive programs and data out of physical memory when space is required by active programs and data.
Relocation can make it appear to a program that more memory exists than is actually implemented by the system. This frees the programmer from working within the limits imposed by the amount of physical memory present in a system. Programmers do not need to know which physical-memory addresses are assigned to other software processes and hardware devices. The addresses visible to programs are translated into the appropriate physical addresses by the processor.
Virtual mode provides greater control over memory protection. Blocks of memory as small as 1 KB can be individually protected from unauthorized access. Protection and relocation enable system software to support multitasking. This capability gives the appearance of simultaneous or near-simultaneous execution of multiple programs.
In MicroBlaze, virtual mode is implemented by the
memory-management unit (MMU), available when C_USE_MMU is set to 3
(Virtual) and C_AREA_OPTIMIZED is set to 0 (Performance) or 2
(Frequency). The MMU controls effective-address to physical-address mapping and supports
memory protection. Using these capabilities, system software can implement demand-paged
virtual memory and other memory management schemes.
The MicroBlaze MMU implementation is based upon the PowerPCTM 405 processor.
The MMU features are summarized as follows:
- Translates effective addresses into physical addresses
- Controls page-level access during address translation
- Provides additional virtual-mode protection control through the use of zones
- Provides independent control over instruction-address and data-address translation and protection
- Supports eight page sizes: 1 kB, 4 kB, 16 kB, 64 kB, 256 kB, 1 MB, 4 MB, and 16 MB. Any combination of page sizes can be used by system software
- Software controls the page-replacement strategy