The Translation Look-Aside Buffer Search Index Register
(TLBSX) is used to search for a virtual page number in the Unified Translation
Look-Aside Buffer (UTLB). It is controlled by the C_USE_MMU configuration option on the MicroBlaze processor.
The register is only implemented if C_USE_MMU is greater than 1 (User Mode), and C_AREA_OPTIMIZED is set to 0 (Performance) or 2 (Frequency).
When written with the MTS instruction, the TLBSX is specified by setting Sa = 0x1005. The following figure illustrates the TLBSX register and the following table provides bit descriptions and reset values.
When 64-bit MicroBlaze
is enabled (C_DATA_SIZE = 64), TLBSX has up to 64
bits, according to the C_ADDR_SIZE parameter,
otherwise it has 32 bits.
| Bits 1 | Name | Description | Reset Value |
|---|---|---|---|
|
0:21 0:n-9 |
VPN |
Virtual Page Number This field represents the page number portion of the virtual memory address. It is compared with the page number portion of the virtual memory address under the control of the SIZE field, in each of the Translation Look-Aside Buffer entries that have the V bit set to 1. If the virtual page number is found, the TLBX register is written with the index of the TLB entry and the MISS bit in TLBX is cleared to 0. If the virtual page number is not found in any of the TLB entries, the MISS bit in the TLBX register is set to 1. Write Only |
|
|
22:31 n-10:n-1 |
Reserved | ||
|
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