The Translation Look-Aside Buffer Index (TLBX) Register is
used as an index to the Unified Translation Look-Aside Buffer (UTLB) when accessing
the TLBLO and TLBHI registers. It is controlled by the C_USE_MMU configuration option on MicroBlaze. The register is only implemented if C_USE_MMU is greater than 1 (User Mode), and C_AREA_OPTIMIZED is set to 0 (Performance) or 2
(Frequency). When accessed with the MFS and MTS instructions, the TLBX is specified
by setting Sa = 0x1002.
The following figure illustrates the TLBX register and the following tale provides bit descriptions and reset values.
| Bits 1 | Name | Description | Reset Value |
|---|---|---|---|
| 0, 32 | MISS |
TLB Miss This bit is cleared to 0 when the TLBSX register is written with a virtual address, and the virtual address is found in a TLB entry. The bit is set to 1 if the virtual address is not found. It is also cleared when the TLBX register itself is written. Read Only Can be read if the memory management
special registers parameter |
0 |
|
1:25 33:57 |
Reserved | ||
|
26:31 58:63 |
INDEX |
TLB Index This field is used to index the Translation Look-Aside Buffer entry accessed by the TLBLO and TLBHI registers. The field is updated with a TLB index when the TLBSX register is written with a virtual address, and the virtual address is found in the corresponding TLB entry. Read/Write Can be read and written if the memory
management special registers parameter |
000000 |
|
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