The Trace Control Register (TCTRLR) is used to define the trace behavior. This register is a write-only register. Issuing a read request has no effect, and undefined data is read. See the following figure and table.
Figure 1. Trace Control Register
| Bits | Name | Description | Reset Value |
|---|---|---|---|
| 21:6 | Tracepoint | Change corresponding breakpoint or watchpoint to a tracepoint | 0 |
| 5:4 | Level |
Trace compression level: 00 = Complete trace, not available with
01 = Program flow 10 = Event 11 = Program flow and cycle count |
00 |
| 3 | Full Halt | Debug Halt on full trace buffer or cycle count overflow | 0 |
| 2 | Save PC |
Level 01 and 11: Save new program counter for all taken branches Level 10: Save new program counter for all function calls |
0 |
| 1 | Save Load | Save load and get instruction new data value | 0 |
| 0 | Save Return | Save new program counter for return instructions | 0 |