System Configuration - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English

The parameter C_LOCKSTEP_SLAVE is set to one on all slave MicroBlaze cores in the system, except the master (or primary) core. The master core drives all the output signals, and handles the debug functionality. The port Lockstep_Master_Out on the master is connected to the port Lockstep_Slave_In on the slaves, to handle debugging. The parameter C_TEMPORAL_DEPTH is provided to support debugging with temporal lockstep, where the slave core execution is delayed a defined number of clock cycles.

The slave cores should not drive any output signals, only receive input signals. This must be ensured by only connecting signals to the input ports of the slaves. For buses this either means that monitor interfaces must be used, or that each individual input port must be explicitly connected.

The port Lockstep_Out on the master and slave cores provide all output signals for comparison. Unless an error occurs, individual signals from each of the cores are identical every clock cycle.

To ensure that lockstep operation works properly, all input signals to the cores must be synchronous. Input signals that could require external synchronization are Interrupt, Reset, Ext_Brk, and Ext_Nm_Brk.