The Stack High Register (SHR) stores the stack high limit use to detect stack underflow. When the address of a load or store instruction using the stack pointer (register R1) as rA is greater than the Stack High Register, a stack underflow occurs, causing a Stack Protection Violation exception if exceptions are enabled in MSR.
When read with the MFS instruction, the SHR is specified by setting Sa = 0x0802. The following figure illustrates the SHR register and the following table provides bit descriptions and reset values.
When 64-bit MicroBlaze is enabled
(
C_DATA_SIZE = 64), the Stack High Register has up to 64 bits,
according to the C_ADDR_SIZE parameter, otherwise it has 32
bits.Note: The register is only implemented if stack
protection is enabled by setting the parameter
C_USE_STACK_PROTECTION to 1. If stack protection is not
implemented, writing to the register has no effect.Note: Stack protection is not available when the MMU is enabled
(
C_USE_MMU > 0). With the MMU page-based memory
protection is provided through the UTLB instead.Figure 1. SHR
| Bits 1 | Name | Description | Reset Value |
|---|---|---|---|
|
0:31 0:C_ADDR_SIZE-1 |
SHR | Stack High Register | All bits set to 1 |
|
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