Process Identifier Register - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English

The Process Identifier Register (PID) is used to uniquely identify a software process during MMU address translation. It is controlled by the C_USE_MMU configuration option on MicroBlaze. The register is only implemented if C_USE_MMU is greater than 1 (User Mode) and C_AREA_OPTIMIZED is set to 0 (Performance) or 2 (Frequency).

When accessed with the MFS and MTS instructions, the PID is specified by setting Sa = 0x1000. The register is accessible according to the memory management special registers parameter C_MMU_TLB_ACCESS.

PID is also used when accessing a TLB entry:

  • When writing Translation Look-Aside Buffer High (TLBHI) the value of PID is stored in the TID field of the TLB entry.
  • When reading TLBHI and MSR[UM] is not set, the value in the TID field is stored in PID.

The following figure illustrates the PID register and the following table provides bit descriptions and reset values.

Figure 1. PID
Table 1. Process Identifier Register (PID)
Bits 1 Name Description Reset Value

0:23

0:55

Reserved

24:31

56:63

PID

Used to uniquely identify a software process during MMU address translation.

Read/Write

0x00
  1. Bit numbers depend on if 64-bit MicroBlaze (C_DATA_SIZE = 64) is enabled or not.