LMB Transactions - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English

The following diagrams provide examples of LMB bus operations.

Generic Write Operations

Figure 1. LMB Generic Write Operation, 0 Wait States
Figure 2. LMB Generic Write Operation, N Wait States

Generic Read Operations

Figure 3. LMB Generic Read Operation, 0 Wait States
Figure 4. LMB Generic Read Operation, N Wait States

Back-to-Back Write Operation

Figure 5. LMB Back-to-Back Write Operation

Back-to-Back Read Operation

Figure 6. LMB Back-to-Back Read Operation

Back-to-Back Mixed Write/Read Operation

Figure 7. Back-to-Back Mixed Write/Read Operation, 0 Wait States
Figure 8. Back-to-Back Mixed Write/Read Operation, N Wait States