Interrupt, Break, and Exception Handling - 2024.2 English

MicroBlaze assumes certain address locations for handling interrupts and exceptions as indicated in the following table. At these locations, code is written to jump to the appropriate handlers.

The code expected at these locations is as shown below. The crt0.o initialization file is passed by the mb-gcc compiler to the mb-ld linker for linking. This file sets the appropriate addresses of the exception handlers.

The following is code for passing control to Exception, Break, and Interrupt handlers, assuming the default C_BASE_VECTORS value of 0x00000000:

0x00:  bri  _start1
0x04:  nop
0x08:  imm  high bits of address (user exception handler)
0x0c:  bri  _exception_handler
0x10:  imm  high bits of address (interrupt handler)
0x14:  bri  _interrupt_handler
0x18:  imm  high bits of address (break handler)
0x1c:  bri  low bits of address (break handler)
0x20:  imm  high bits of address (HW exception handler
0x24:  bri  _hw_exception_handler

With low-latency interrupt mode, control is directly passed to the interrupt handler for each individual interrupt utilizing this mode. In this case, it is the responsibility of each handler to save and restore used registers. The MicroBlaze C compiler (mb-gcc) attribute fast_interrupt is available to allow this task to be performed by the compiler:

void interrupt_handler_name() __attribute__((fast_interrupt));

MicroBlaze allows exception and interrupt handler routines to be located at any address location addressable using 32 bits.

• The user exception handler code starts with the label _exception_handler
• The hardware exception handler starts with _hw_exception_handler
• The interrupt handler code starts with the label _interrupt_handler for interrupts that do not use low-latency handlers.

In the current MicroBlaze system, there are dummy routines for interrupt, break, and user exception handling, which you can change. In order to override these routines and link your own interrupt and exception handlers, you must define the handler code with specific attributes.

The interrupt handler code must be defined with attribute interrupt_handler to ensure that the compiler will generate code to save and restore used registers and emit an rtid instruction to return from the handler:

void function_name() __attribute__((interrupt_handler));

The break handler code must be defined with attribute break_handler to ensure that the compiler will generate code to save and restore used registers and emit an rtbd instruction to return from the handler:

void function_name() __attribute__((break_handler));

For more details about the use and syntax of the interrupt handler attribute, refer to the GNU Compiler Tools chapter in the Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400).

When software breakpoints are used in the Xilinx System Debugger (XSDB) tool or the AMD Vitis™ Development Environment, the Break (HW/SW) address location is reserved for handling the software breakpoint.