General Purpose Registers - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)

Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English

The thirty-two 32-bit or 64-bit General Purpose Registers are numbered R0 through R31. The register file is reset on bit stream download (reset value is 0x00000000). The following figure is a representation of a General Purpose Register and the following table provides a description of each register and the register reset value (if existing).

When 64-bit MicroBlaze is enabled (C_DATA_SIZE = 64), the General Purpose Registers have 64 bits, otherwise they have 32 bits.

Note: The register file is not reset by the external reset inputs: Reset and Debug_Rst.
Figure 1. R0-R31 X19739-UG984-R0-R31 Sheet.2 Sheet.1001 R0 – R31 R0 – R31 Sheet.1002 Sheet.1003 0 0 Sheet.1004 C_DATA_SIZE - 1 C_DATA_SIZE - 1 Sheet.3 X19739-111417 X19739-111417
Table 1. General Purpose Registers (R0-R31)
Bits 1 Name Description Reset Value
  • 0:63
  • 0:31
R0 Always has a value of zero. Anything written to R0 is discarded 0x0
R1 through R13 General purpose registers -
R14 Register used to store return addresses for interrupts. -
R15 General purpose register. Recommended for storing return addresses for user vectors. -
R16 Register used to store return addresses for breaks. -
R17 If MicroBlaze is configured to support hardware exceptions, this register is loaded with the address of the instruction following the instruction causing the HW exception, except for exceptions in delay slots that use BTR instead (see (Branch Target Register)); if not, it is a general purpose register. -
R18 through R31 General purpose registers. -
  1. 64 bits with 64-bit MicroBlaze (C_DATA_SIZE = 64) and 32 bits otherwise.

See (Table 1) for software conventions on general purpose register usage.