The Exception Data Register (EDR) stores data read on an AXI4-Stream link that caused a stream exception.
The contents of this register are undefined for all other
exceptions. When read with the MFS instruction, the EDR is specified by setting Sa =
0x000D. The following figure illustrates the EDR register and the following table
provides bit descriptions and reset values.
Note: The register is only implemented if
C_FSL_LINKS is greater than 0 and C_FSL_EXCEPTION is set to 1.Figure 1. EDR
| Bits | Name | Description | Reset Value |
|---|---|---|---|
| 0:31 | EDR | Exception Data Register | 0x00000000 |