Exception Address Register - 2024.2 English

The Exception Address Register (EAR) stores the full load/store address that caused the exception for the following:

• An unaligned access exception that specifies the unaligned access data address
• An M_AXI_DP exception that specifies the failing AXI4 data access address
• A data storage exception that specifies the (virtual) effective address accessed
• An instruction storage exception that specifies the (virtual) effective address read
• A data TLB miss exception that specifies the (virtual) effective address accessed
• An instruction TLB miss exception that specifies the (virtual) effective address read

The contents of this register are undefined for all other exceptions. When read with the MFS or MFSE instruction, the EAR is specified by setting Sa = 0x0003. The EAR register is illustrated in the following figure and the following table provides bit descriptions and reset values.

With 32-bit MicroBlaze (parameter C_DATA_SIZE = 32) and extended data addressing is enabled (parameter C_ADDR_SIZE > 32), the 32 least significant bits of the register are read with the MFS instruction, and the most significant bits with the MFSE instruction.

With 64-bit MicroBlaze (parameter C_DATA_SIZE = 64) the entire register can be read with the MFS instruction.