Data and Instruction Address Extension - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)
Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English

MicroBlaze has the ability to address up to 16 EB of data controlled by the parameter C_ADDR_SIZE, and with 32-bit MicroBlaze also supports a physical instruction address up to 16 EB when the MMU Physical Address Extension (PAE) is enabled by setting C_USE_MMU = 3 (Virtual).

With 64-bit MicroBlaze both the virtual and physical address are extended according to the parameter C_ADDR_SIZE. This applies to both instruction and data address spaces, thus eliminating all limitations imposed by using 32-bit MicroBlaze listed here.

The parameter C_ADDR_SIZE can be set to the following values:

Table 1. C_ADDR_SIZE Values
NONE 4 * 10243 bytes 32-bit address, no extended address instructions or PAE
64 GB 64 * 10243 bytes 36-bit address
1TB 10244 bytes 40-bit address
16 TB 16 * 10244 bytes 44-bit address
256 TB 256 * 10244 bytes 48-bit address
4 PB 4 * 10245 bytes 52-bit address
16 EB 16 * 10246 bytes 64-bit address

There are a number of software limitations with extended addressing when using 32-bit MicroBlaze:

  • The GNU tools only generate ELF files with 32-bit addresses with 32-bit MicroBlaze, which means that program instruction and data memory must be located in the first 4 GB of the address space. This is also the reason the instruction address space does not provide an extended address unless PAE is enabled.

    With PAE enabled, the majority of the program instruction and data can be located at any physical address, but all software running in real mode must be located in the first 4 GB of the address space. The MMU UTLB must also be initialized to set up the virtual to physical address translation by software running in real mode, before virtual mode is activated.

  • Because all software drivers use address pointers that are 32-bit unsigned integers, it is not possible to access physical extended addresses above 4 GB without modifying the driver code, and consequently all AXI peripherals should be located in the first 4 GB of the address space.

    With PAE enabled, AXI peripherals can be located at any physical address, provided that the virtual address remains in the first 4 GB of the address space.

  • The extended address is only treated as a physical address, and the MMU cannot be used to translate from an extended virtual address to a physical address.

    This also means that without PAE support, Linux can only use the data address extension through a dedicated driver operating in real mode.

    The extended address load and store instructions are privileged when the MMU is enabled, unless they are allowed by setting the parameter C_MMU_PRIVILEGED_INSTR appropriately. If allowed, the instructions bypass the MMU translation treating the extended address as a physical address.

  • The GNU compiler does not handle 64-bit address pointers, which means that unless PAE is enabled the only way to access an extended address is using the specific extended addressing instructions, available as macros.

The following C code exemplifies how an extended address can be used to access data:

#include "xil_types.h"
   #include "mb_interface.h"
   int main()
   {
      u64 Addr = 0x000000FF00000000LL; /* Extended address */
      u32 Word;
      u8 Byte;

      Word = lwea(Addr);    /* Load word from extended address */
      swea(Addr, Word);    /* Store word to extended address */
      Byte = lbuea(Addr);    /* Load byte from extended address */
      sbea(Addr, Byte);    /* Store byte to extended address */
   }