OBUFT - 2024.1 English

UltraScale Architecture Libraries Guide (UG974)

Document ID
UG974
Release Date
2024-05-30
Version
2024.1 English

Primitive: 3-State Output Buffer

  • PRIMITIVE_GROUP: I/O
  • PRIMITIVE_SUBGROUP: OUTPUT_BUFFER
  • Families: UltraScale, UltraScale+

Introduction

The generic 3-state output buffer OBUFT typically implements 3-state outputs or bidirectional I/O.

I/O attributes that do not impact the logic function of the component, such as IOSTANDARD, DRIVE, and SLEW, should be supplied to the top-level port via an appropriate property. For details on applying such properties to the associated port, see the Vivado Design Suite Properties Reference Guide (UG912).

Logic Table

Inputs Outputs
T I O
1 X Z
0 1 1
0 0 0

Port Descriptions

Port Direction Width Function
I Input 1 Input of OBUF. Connect to the logic driving the output port.
O Output 1 Output of OBUF to be connected directly to top-level output port.
T Input 1 3-state enable input.

Design Entry Method

Instantiation Yes
Inference Recommended
IP and IP Integrator Catalog No

VHDL Instantiation Template

Unless they already exist, copy the following two statements and paste them before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;

-- OBUFT: 3-State Output Buffer
--        UltraScale
-- Xilinx HDL Language Template, version 2024.1

OBUFT_inst : OBUFT
port map (
   O => O, -- 1-bit output: Buffer output (connect directly to top-level port)
   I => I, -- 1-bit input: Buffer input
   T => T  -- 1-bit input: 3-state enable input
);

-- End of OBUFT_inst instantiation

Verilog Instantiation Template


// OBUFT: 3-State Output Buffer
//        UltraScale
// Xilinx HDL Language Template, version 2024.1

OBUFT OBUFT_inst (
   .O(O), // 1-bit output: Buffer output (connect directly to top-level port)
   .I(I), // 1-bit input: Buffer input
   .T(T)  // 1-bit input: 3-state enable input
);

// End of OBUFT_inst instantiation

Related Information

  • UltraScale Architecture SelectIO Resources User Guide (UG571)
  • Vivado Design Suite Properties Reference Guide (UG912)