OBUF - 2025.1 English - Primitive: Output Buffer - UG974

UltraScale Architecture Libraries Guide (UG974)

Document ID
UG974
Release Date
2025-05-29
Version
2025.1 English

Primitive: Output Buffer

  • PRIMITIVE_GROUP: I/O
  • PRIMITIVE_SUBGROUP: OUTPUT_BUFFER
  • Families: UltraScale, UltraScale+

Introduction

An output buffer (OBUF) must be used to drive signals from the device to external output pads.

I/O attributes that do not impact the logic function of the component, such as IOSTANDARD, DRIVE, and SLEW, should be supplied to the top-level port via an appropriate property. For details on applying such properties to the associated port, see the Vivado Design Suite Properties Reference Guide (UG912).

Port Descriptions

Port Direction Width Function
I Input 1 Input of OBUF. Connect to the logic driving the output port.
O Output 1 Output of OBUF to be connected directly to top-level output port.

Design Entry Method

Instantiation Yes
Inference Recommended
IP and IP Integrator Catalog No

VHDL Instantiation Template

Verilog Instantiation Template

Related Information