Primitive: 32-bit non-volatile design ID
- PRIMITIVE_GROUP: CONFIGURATION
- PRIMITIVE_SUBGROUP: EFUSE
- Families: UltraScale FPGAs, UltraScale+ FPGAs
Introduction
Provides internal access to the 32 non-volatile, user-programmable eFUSE bits.
Port Descriptions
| Port |
Direction |
Width |
Function |
| EFUSEUSR<31:0> |
Output |
32 |
User eFUSE register value output. |
Design Entry Method
| Instantiation |
Recommended |
| Inference |
No |
| IP and IP Integrator Catalog |
No |
Available Attributes
| Attribute |
Type |
Allowed Values |
Default |
Description |
| SIM_EFUSE_VALUE |
HEX |
Any 32-bit HEX value |
All zeroes |
Value of the 32-bit non-volatile value used in simulation. |
VHDL Instantiation Template
Verilog Instantiation Template