Running the Simulator in Vivado IDE - 2024.1 English

Vivado Design Suite Tutorial: Logic Simulation (UG937)

Document ID
UG937
Release Date
2024-06-12
Version
2024.1 English

In this lab, you create a new AMD Vivado™ Design Suite project, add HDL design sources, add IP from the AMD IP catalog, and generate IP outputs needed for simulation. Then you run a behavioral simulation on an elaborated RTL design.