USER_CLOCK_EXPANSION_WINDOW - 2025.1 English - UG912

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2025-05-29
Version
2025.1 English

The USER_CLOCK_EXPANSION_WINDOW property is intended to help manage clock load placement across the device. By default, the Vivado placer will automatically assign a clock expansion window to achieve the best timing characteristics for the design while balancing clock routing demand. The tool assigned expansion window is defined in the read-only CLOCK_EXPANSION_WINDOW property. Ideally its value should match the user-defined USER_CLOCK_EXPANSION_WINDOW property if it is defined. The USER_CLOCK_EXPANSION_WINDOW property lets you manually assign the expansion window.

Important: The USER_CLOCK_EXPANSION_WINDOW property can be set on a global clock net and can only be assigned to the net segment directly driven by the global clock buffer (BUFG).

The USER_CLOCK_EXPANSION_WINDOW property is validated and used during clock load placement, so the assignment should be made prior to placement. However, if you assign the property after placement, you will need to rerun placement or unroute the clock net and use the update_clock_routing Tcl command to implement the change and affect the design.

Sub-optimal selection of the property value might lead to placement failures or degrade quality of the results.

Architecture Support
Versal adaptive SoC architectures.
Applicable Objects
Global clock net (get_nets) directly connected to the output of a global clock buffer.
Values
  • <clock_region1:clock_region2>: Specifies rectangular area formed with clock regions from clock_region1 (left bottom corner) and clock_region2 (upper right corner) on the target part.
  • <objects>: Specified as one or more net segments directly driven by the global clock buffer (BUFG).

Syntax

Verilog Syntax

Not applicable

VHDL Syntax

Not applicable

XDC Syntax
set_property USER_CLOCK_EXPANSION_WINDOW <clock_region1:clock_region2> <objects>

XDC Syntax Examples:

set_property USER_CLOCK_EXPANSION_WINDOW CLOCKREGION_X1Y1:CLOCKREGION_X3Y1 [get_nets {clk1 clk2}]
Tip: The clock net can also be defined using the global clock buffer instance, or output pin, as shown in the following example:
set_property USER_CLOCK_EXPANSION_WINDOW CLOCKREGION_X1Y1:CLOCKREGION_X3Y1 [get_nets -of [get_pins bufferName/O]]

Affected Steps

  • Placer
  • PhysOpt