PSIP_RETIMING_FORWARD is used to manually retime registers from a combinational cell's inputs to its output. Apply the PSIP_RETIMING_FORWARD to the combinational cell to achieve the retiming optimization during the Physical Synthesis in Placer (PSIP) phase of the Place Design step.
- Architecture Support
- All architectures
- Applicable Objects
- Cells (
get_cells) - Values
-
- True (or 1): The Vivado PSIP engine performs forward retiming.
- False (or 0): The Vivado PSIP engine does not perform forward retiming.
- XDC Syntax
-
set_property PSIP_RETIMING_FORWARD TRUE [get_cells <cell_name> ]
Affected Steps
- Place Design