PSIP_RETIMING_FORWARD - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-06-05
Version
2024.1 English

The PSIP_RETIMING_FORWARD attribute instructs the tool to move a register from the input of a gate and creates new registers at the output of same gate. Applying this attribute on a cell instructs the PSIP engine (Physical Synthesis in Placer, a sub phase in placer optimization) to perform retiming.

Architecture Support
All architectures
Applicable Objects
Cells (get_cells)
Values
  • True (or 1): The Vivado PSIP engine performs forward retiming.
  • False (or 0): The Vivado PSIP engine does not perform forward retiming.
XDC Syntax
set_property PSIP_RETIMING_FORWARD TRUE [get_cells <cell_name> ]

Affected Steps

  • Place Design