PSIP_RETIMING_BACKWARD - 2025.1 English - UG912

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2025-05-29
Version
2025.1 English

PSIP_RETIMING_BACKWARD is used to manually retime a register from a combinational cell's output to its inputs. Apply the PSIP_RETIMING_BACKWARD to the combinational cell to achieve the retiming optimization during the Physical Synthesis in Placer (PSIP) phase of the Place Design step.

Architecture Support

All architectures.

Applicable Objects

Cells (get_cells).

Values
  • True (or 1): The Vivado PSIP engine performs backward retiming.
  • False (or 0): The Vivado PSIP engine does not perform backward retiming.

Affected Steps

  • Place Design