PSIP_RETIMING_BACKWARD - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-06-05
Version
2024.1 English

The PSIP_RETIMING_BACKWARD attribute instructs the tool to move a register from the output of a gate and creates new registers at the inputs of the same gate. Applying this attribute on a cell instructs the PSIP engine (Physical Synthesis in Placer, a sub phase in placer optimization) to perform retiming.

Architecture Support

All architectures.

Applicable Objects

Cells (get_cells).

Values
  • True (or 1): The Vivado PSIP engine performs backward retiming.
  • False (or 0): The Vivado PSIP engine does not perform backward retiming.

Affected Steps

  • Place Design