Spartan UltraScale+ Device Programming - 2025.2 English - UG909

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2025-12-17
Version
2025.2 English

Spartan UltraScale+ devices do have ICAP resources, but they are reserved for the soft error mitigation (SEM) IP. Instead, the internal configuration access port is the AXI32 primitive, which provides a hardened AXI4 interface to the platform management controller. The AXI32 primitive can be accessed in IP integrator (IPI) with the PMC Bridge IP or using the XPM_PMC_BRIDGE module to instantiate AXI32 in the user design.

Figure 1. Spartan UltraScale+ PMC Bridge IP

In addition to the AXI32 resource, the set of supported configuration modes are listed in Table 1.

Note: The MCAP connection is only available in larger Spartan UltraScale+ devices (xcsu65p and larger) that contain a PCIe® hard block.