RTL Modular NoC Flow - 2024.2 English - UG909

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2024-12-13
Version
2024.2 English

In modular NoC flow, you instantiate Xilinx Parameterized Macros (XPMs) of PL-facing NMU and NSU in your RTL. The XPM NMU and NSU can be instantiated in the static or dynamic regions of the design. Xilinx design constraints (XDCs) are used to make connections between NMU and NSU. To learn more about the modular NoC flow, see the Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387).

As stated in NoC Topologies Supported in the DFX Design Flow, DFX flow supports all four NoC topologies described above. It is straightforward when NoC endpoints (NMU or NSU) are entirely within either the static region or dynamic region. However, if a NoC network spans DFX partitions (for example, NMU in static and NSU in dynamic), additional constraints are needed.