When using embedded I/O buffers within reconfigurable modules (RMs) in a dynamic function eXchange (DFX) design, it is critical to follow a structured approach to avoid tool insertion errors, DRC violations, and routing issues.
Following are the recommended methodologies to correctly implement embedded IOBs within a reconfigurable partition:
- Avoid I/O buffers (IOB) instantiation and inference at the top-level.
- Do not instantiate I/O buffers (for example, IBUF, IBUFDS) in static RTL for any XPIOs that are part of an RM. This prevents conflicts where both static and RM try to drive the same I/O, leading to cascaded buffer errors.
- By default, Vivado infers IOBs at the
top-level of the design. Apply the RTL attribute
IO_BUFFER_TYPE = "NONE"on the top-level port connected to the embedded IOB. This prevents Vivado from automatically inferring an IOB at the top level, avoiding duplication and conflicts.
- Instantiate I/O buffers inside the RM.
- The RM IP or RTL must instantiate the appropriate I/O buffers (for example, IBUF, IBUFDS) for the embedded I/Os.
- For block designs, you can add the utility buffer IP to instantiate IOBs within the RM or use HDL file containing instantiated buffers as a module reference.
- Ensure netlist continuity for Unused Embedded IOBs
- When specific embedded IOBs are unused in a specific RM compile, those I/O pads should be connected all the way to the reconfigurable module hierarchy in the netlist and be unconnected within the specific RM.
- To guide the I/O Placer, users are expected to keep corresponding PACKAGE_PIN constraints for those ports even in those compiles that do not use those I/O pads.
- Reapply the I/O constraints for every configuration
- If an RP has embedded I/O, the I/O (PACKAGE_PIN, IOSTANDARD, direction) must be reapplied for every configuration, even if the I/O pins are identical between every RM.
- In the Vivado database, a port is a top-level object. However, the I/O constraint information associated with that port is intentionally cleared out during carving of the RM if the associated I/O buffer is part of an RP.
- Do not share I/O banks between static and RP.
- I/O banks must be fully contained within either the static region or a single RP.
- Sharing I/O banks across static and RP or between multiple RPs is not supported.
- If I/O ports are constrained to a bank that is part of static, the tool raises an HDPR-29 DRC error during implementation.
- Verify I/O bank inclusion and buffer placement.
- Ensure the Pblock for the RM includes the relevant I/O bank.
- Validate the physical placement of the embedded IOBs is within the RM’s Pblock.