Drawing an Analogy to Timing Constraints - 2024.2 English - UG909

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2024-12-13
Version
2024.2 English

The virtual NoC interface functions similarly to the hierarchical pins at the boundary of the DFX module, but it is modeled within the XDC domain. The timing constraints methodology suggested for paths crossing DFX modules also applies to NoC constraints. For instance, consider the scenario depicted below.

Figure 1. Treat Virtual NoC Interface as a Hierarchical Pin of the NoC Connection at the DFX Boundary
If you need timing constraints applied to paths across DFX module boundaries (such as the false path constraint on all timing paths from a specific static leaf cell to an RM leaf cell of all RM variants), defining the constraint referencing an object inside a specific RM variant might lead to invalid constraints if the next RM variant has a different netlist. For example, a false path constraint defined as:
set_false_path -from [get_pins static_FF/Q] -to [get_pins Dynamic_FF/D]
is referring to an object inside the dynamic region (D pin of a register inside the reconfigurable module). This constraint can become invalid as the next RM variant might not have this netlist object. Therefore, the recommendation is to define the timing constraint referencing the hierarchical pin at the DFX module boundary. The same false path constraint can be rewritten to point to refer all paths traversing through the hierarchical pin:
set_false_path -from [get_pins static_FF/Q] -through [get_pins Dynamic_Inst/Data]
This approach allows the constraint to be maintained in the abstract or full shell, ensuring that any timing path through that hierarchical pin always receives the intended constraint.
Similarly, NoC constraints across DFX boundaries also follow a comparable methodology, where any NoC connection between static and DFX partitions must pass through the virtual NoC interface. For example, instead of creating a NoC connection direction from NMU in static to an NSU in dynamic region:
create_noc_connection -source static_NMU -target dynamic_NSU
AMD recommends creating the NoC connection to/from the virtual NoC interface created at the DFX boundary:
create_noc_connection -source static_NMU -target virtual_NSU