AMD Vivado™ 2024.2 contains a major enhancement to the implementation tools. The Advanced Flow is a new place and route feature set that enables both faster compile times and improved performance by leveraging more advanced technologies and parallelization techniques. When targeting Versal technologies, the Advanced Flow is always run. 7 series or AMD UltraScale™ architectures do not use the Advanced Flow.
Versal DFX designs created prior to 2024.2 can be migrated to the Advanced Flow. Upgrading to 2024.2 requires more consideration than prior Vivado version upgrades due to the impact of Advanced Flow. You might not want to migrate designs in production or designs nearing completion, especially if you have invested many iterations to improve timing.
One limitation that makes 2024.2 upgrades more restrictive is that placement and routing data cannot be migrated to 2024.2 because Advanced Flow uses different internal data structures than prior releases. This means any pre-2024.2 design that has run past the Place Design step is incompatible with 2024.2. Therefore, platforms that have been released prior to 2024.2 cannot be imported into 2024.2 to update reconfigurable modules or create new ones.
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is attempted.For Vivado projects, automatic migration takes place when the project is opened in version 2024.2 or newer. The migration process modifies the project's implementation runs to ensure only advanced flow supported commands are used. Once a Versal project has been migrated to Advanced Flow, it cannot be opened in prior Vivado versions. Therefore, it is highly recommended that the project be backed up under revision control. For non-project users, minor scripts modifications are required.
After a project is migrated to Advanced Flow, rerun all parent and child configuration runs to establish a new static design image and collection of reconfigurable modules. For most designs, there is no need to rerun synthesis. The one exception is for designs with a single reconfigurable partition targeting devices using SSI Technology – for these scenarios synthesis must be rerun as well to ensure the correct NoC data is established and passed through the entire flow.
After migration has been done, keep a close watch on the design results to see if further adjustments are necessary. One change that is seen is the adjustment of Reconfigurable Partition Pblocks – the base Pblock snaps out to include all covered programmable units instead of in, which might identify more resources as dynamic rather than static. In certain situations this could lead to unroutable situations if the static design does not have resources necessary to find a solution.
For more information on the Advanced Flow, see Vivado Design Suite User Guide: Implementation (UG904) and Answer Record 000036830.