In Versal, the majority of clocking
resources appear in the bottom horizontal super row (HSR). Since most of the clocking
resources are located at bottom row of the device, users can have an island for
reconfigurable Pblock in the bottom HSR if they need internal clocking resources inside
the reconfigurable partition. For example, in the following figure rp1 Pblock is split into two rectangles, one for the
placement of logic and other for the placement of clocking resources.
Figure 1. Clocking Resources
Clock Routing expansion automatically picks up required clock tiles for routing even though clocking resources are in a separate island of the Pblock.
Figure 2. Clock Routing Expansion
Important: It is recommended to draw
contiguous Pblocks like
rp2. This avoids static
region’s island-like placement and eases routability and timing closure.