The Virtual Input/Output (VIO) debug feature can both monitor and drive internal FPGA, SoC, or Versal adaptive SoC signals in real time. In the absence of physical access to the target hardware, use this debug feature to drive and monitor signals present on the real hardware.
This debug core needs to be instantiated in the RTL code, hence you need to know up-front, what nets to drive. The IP catalog lists this core under the Debug category. You can find detailed documentation on the VIO core IP in the Virtual Input/Output LogiCORE IP Product Guide (PG159).