The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 06/23/2026 Version 2026.1 | |
| Generating the Bitstream or Device Image | Updated Generating a Programmable Device Image (PDI) on Spartan UltraScale+ FPGAs and Considerations for Segmented Configuration |
| Programming Configuration Memory Devices | Added two new sections: |
| Standard Test and Programming Language (STAPL) Programming | Updated Using the Command Line |
| In-System Logic Design Debugging Flows | Updated AXI4 Debug Hub |
| Debugging the Serial I/O Design in Hardware | Updated Creating and Running Link Sweeps |
| Advanced Programming Features | Updated Bitstream Verify and Readback for FPGAs and MPSoCs |
| Device Configuration Bitstream or PDI Settings | Added new settings to Spartan UltraScale+ Programmable Device Image (PDI) Settings |
| Configuration Memory Support | Updated flash memory device tables |