The Integrated Logic Analyzer (ILA) feature allows you to perform in-system debugging of post-implemented designs on an FPGA, SoC, or AMD Versal™ device. This feature is used when there is a need to monitor signals in the design. You can also use this feature to trigger on hardware events and capture data at system speeds.
You can instantiate the ILA core in your RTL code or insert it post synthesis in Vivado design flow. For detailed documentation on the ILA core IP, refer to the Integrated Logic Analyzer LogiCORE IP Product Guide (PG172).