AMD Versal™ devices feature a Control Interface and Processing System IP core. This subsystem is used to configure PL, NoC, and AI Engine. The Control Interface and Processing System is divided into the following power domains. These power domains can operate independently.
- Platform Management Controller (PMC)
- PMC is always on. It is used for device configuration and management. The PMCIOs are a part of this domain. PMC is powered by VCC_PMC rail.
- Full Power Domain (FPD)
- This domain consists of application processing units (APUs) such as Dual A72 Core, L2 Cache, FPD Interconnect, and CCIX. FPD is powered by VCC_PSFP rail.
- Low Power Domain (LPD)
- This domain consists of real-time processing units such as Dual R5, TCM, OCM, and LPD Interconnect. LPD is powered by VCC_PSLP. PSIOs (Dual GEM, USB, and other IO's) are a part of this domain. The IO supply required for the LPD is VCCO_502 and it depends on the type of PSIO used.
Following are the parameters which can be modified using Control Interface and Processing System (CIPS) or PS wizard IP core configuration wizard in Vivado.
- PMC
- PMC subsystem clock frequency and peripheral IO clocks can be modified.
- FPD
- A72 operation clock and FPD interconnect clocks.
- LPD
- Dual R5 Operating Clock and LPD Interconnect Clocks.
- PS IO clocks like GEM and USB. IO standards for each bank can also be configured.
For more information, see Control, Interface and Processing System LogiCORE IP Product Guide (PG352).
Power numbers reported by report_power are for a default operating load of 90% for all processing systems including A72, R5, and PMC (also the interconnects ). For an IO power estimate, IOs need to be configured from the IP configuration wizard, if not it reports zero power for the IOs. The power reported for a PS instance is the sum of all the PS rails (VCC_PSFP, VCC_PSLP, and IOs).
To change default power settings of the PS on the PS, use the Power Tab in the Wizard. From the tab, you can vary the number of active A72 and R5 cores, their individual load percentages, the LPD and FPD interconnect loads, OCM/TCM active block counts, and the PMC core subsystem load. These knobs only affect the report_power results — they do not modify the Configuration Data Object (CDO) / boot configuration of the device or its runtime behavior.
If you need to explore power of multiple PS scenarios, export results and perform what-if analysis in PDM.
Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 devices have an updated processing system with:
- Up to eight A78 Automotive Enhanced CPU instances arranged as dual-core clusters, four clusters in the Full Power Domain.
- Up to 10 RPUs with two RPUs per cluster, five clusters in the Low Power Domain.
- Enhanced OCM capacity.
The PS power report is similar to previous PS architectures. Export results to Power Design Manager (PDM) tool for cluster-level power.
The PS Wizard exposes the same kind of power settings for the updated PS (PSX* blocks). Because the APU and RPU are organized as independent dual-core clusters, the parameters are exposed per cluster, so you can model scenarios such as "three of the four A78AE clusters active at 80% load, one cluster idle." A cluster with active blocks set to zero contributes zero core power; the rest scale with their per-cluster load. As above, these are analysis-only settings and do not change the device CDO/boot configuration.