Using Pblock-Based Floorplanning - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

The highlighted block in the previous figure is a Pblock. Pblocks constrain cells to a specific area of a device. The Pblock in the previous figure constrains some fabric logic, DSPs, and RAMs to the highlighted area. The Pblock was created with the following commands:

create_pblock Pblock_usbEngine
add_cells_to_pblock [get_pblocks Pblock_usbEngine] [get_cells -quiet [list 
usbEngine1]] 
resize_pblock [get_pblocks Pblock_usbEngine] -add {SLICE_X8Y105:SLICE_X23Y149} 
resize_pblock [get_pblocks Pblock_usbEngine] -add {DSP48_X0Y42:DSP48_X1Y59} 
resize_pblock [get_pblocks Pblock_usbEngine] -add {RAMB18_X0Y42:RAMB18_X1Y59} 
resize_pblock [get_pblocks Pblock_usbEngine] -add {RAMB36_X0Y21:RAMB36_X1Y29}

The first line creates the Pblock. The second line (add_cells_to_pblock) assigns a hierarchical cell to the Pblock. Four resource types are assigned to the Pblock: SLICE, DSP48, RAMB18, and RAMB36. The resources assigned to a Pblock are called the Pblock's range.

Note: By default, Pblocks are soft constraints, which guide cell placement within the Pblock range while permitting placement outside the range when required for optimal quality of results (QoR). To make a Pblock hard and force all assigned cells to be placed within the Pblock range, set the IS_SOFT property to 0:
set_property IS_SOFT 0 [get_pblocks Pblock_usbEngine]
Note: Although Pblocks are soft by default, they cannot exceed the utilization capacity of the assigned resources.

Logic assigned to a Pblock that has no corresponding site types in the Pblock range is not constrained by the Pblock and can be placed anywhere on the device. This means you can assign an entire hierarchy to a Pblock while only constraining specific cell types by including only those resource types in the Pblock range. For example, to update the previous Pblock example to only constrain the RAMs in the assigned hierarchy, assign only the RAM sites to the Pblock range.

Figure 1. Pblock Grids

The equivalent XDC commands to change the Pblock to only constrain the RAM cells are:
create_pblock Pblock_usbEngine
add_cells_to_pblock [get_pblocks Pblock_usbEngine] [get_cells -quiet [list 
usbEngine1]] 
resize_pblock [get_pblocks Pblock_usbEngine] -add {RAMB18_X0Y42:RAMB18_X1Y59} 
resize_pblock [get_pblocks Pblock_usbEngine] -add {RAMB36_X0Y21:RAMB36_X1Y29}

The block RAMs are constrained to the Pblock boundaries, but the slice logic is free to be placed anywhere on the device.

Tip: When placing Pblocks, be careful not to floorplan hierarchy in such a manner that it crosses the central config block.
Figure 2. Avoiding the Config Block