Not every design meets timing on its own. You might need to guide the tools to a solution. Floorplanning lets you guide the tools through high-level hierarchy layout or detailed gate placement.
You can achieve the greatest improvements by fixing the worst or most common problems first. For example, if there are outlier paths with significantly worse slack or high logic levels, fix those paths first. Use to view outlier paths. If the same timing endpoint appears in several negative slack paths, improving one of these paths can also improve the others on that endpoint.
Use floorplanning to increase performance by reducing route delay or increasing logic density on a non-critical block. Logic density measures how tightly the logic is packed on the chip. Floorplanning can help you reach a higher clock frequency and improve consistency.
There are multiple floorplanning approaches, each with advantages and disadvantages.