The second half of the timing path report gives you detailed information about the cells, pins, ports, and nets that the path traverses. This section is divided into three parts:
- Source Clock Path
- This shows the circuitry the source clock traverses from its source point to the startpoint of the datapath. You do not see this section for a path that starts from an input port.
- Data Path
- This shows the circuitry the data traverses from the startpoint to the endpoint.
- Destination Clock Path
- This shows the circuitry the destination clock traverses from its source point to the clock pin at the datapath endpoint.
The Source Clock Path and Data Path sections operate together and use the same type of delay:
- Maximum delay for setup and recovery analysis
- Minimum delay for hold and removal analysis
These two sections share the accumulated delay, starting at the data launch edge time and continuing through both the source clock path and the data path.
The destination clock path always uses the opposite type of delay compared to the source clock and data paths. Its accumulated delay begins at the time when the data capture edge is launched at the source point of the destination clock. The final value is the data required time.
The final lines of the report summarize how the tool computes slack:
- For max delay analysis (setup/recovery):Slack = data required time - data arrival time
- For min delay analysis (hold/removal):Slack = data arrival time - data required time