The Timer Settings section shows the timing engine settings used to generate the report. These options determine how Vivado performs timing analysis and affect the accuracy and coverage of the results.
Figure 1. Timing Summary Report: Timer Settings
This section includes the following settings:
- Enable Multi-Corner Analysis
- Enables timing analysis for all configured timing corners.
- Enable Pessimism Removal (and Pessimism Removal Resolution)
- Removes clock skew between the source and destination clocks at their common node.
- Enable Input Delay Default Clock
- Applies a default null input delay to input ports that lack user-defined constraints. This option is disabled by default.
- Enable Preset / Clear Arcs
- Allows timing analysis through asynchronous control pins like preset and clear. It does not apply to recovery or removal checks. This option is disabled by default.
- Disable Flight Delays
- Excludes package delays from I/O delay calculations.
For details on how to configure these settings, see config_timing_analysis in the
Vivado
Design Suite Tcl Command Reference Guide (UG835).