Single-Bit Synchronizer - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

The single-bit synchronizer consists of a chain of flip-flops used to safely transfer a signal from one clock domain to another.

Figure 1. Simplified Topology of a Single-Bit Synchronizer

Key characteristics:

  • You must set the ASYNC_REG property on at least the first two flip-flops in the chain.
  • Synchronizer depth is defined by the number of chained flip-flops that share the same control signals.
  • If the CLEAR or PRESET pins of the flip-flops are connected to an asynchronous source, the CDC engine reports the circuit as a single-bit synchronizer, not as an asynchronous reset synchronizer.