Resolution - Resolution - 2026.1 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2026-06-23
Version
2026.1 English

Design the crossing path with proper synchronization. At minimum, add a double-register logic synchronizer on the capture clock side.

If a FIFO or higher-level protocol already exists on the path, this check can be safely ignored. For a detailed list of CDC violations, run report_cdc.